Wyniki 1-2 spośród 2 dla zapytania: authorDesc:"ANDRZEJ WIELGUS"

Digital implementation of a programmable type-2 fuzzy logic controller


  Fuzzy systems are widely used in many applications concerning control. Most of them utilize classical models of fuzzy systems. Every fuzzy system is associated with some kinds of uncertainties which affect model’s accuracy. Since all fuzzy systems are based on some expert knowledge, and it is common truth that words can mean different things to different people, it seems clear that uncertainties are an integral part of such systems. Type-2 fuzzy logic systems are capable of handling and model such uncertainties, thus improving model’s accuracy. Practical applications of type-2 fuzzy logic controllers (FLCs) are mostly based on software implementations for general purpose processors. While the classical fuzzy controllers are often implemented in hardware as digital or analogue electronic circuits, only few hardware implementations of type-2 FLCs have been proposed [4, 11, 12]. All of them use the simplified type of type-2 fuzzy sets, called interval type-2 fuzzy sets, and approximation method of type reduction. Some papers [11, 12] present FPGA based implementations. In [4] highly parallel architecture of a pipelined fuzzy logic processor is presented. It reaches high inference speed over 3 MFLIPS, but the area cost and power consumption are also very high. In this paper the authors propose a different architecture of a type-2 FLC, which was designed for serial processing of fuzzy rules combined with parallel processing of upper and lower membership functions of type_2 fuzzy sets. Hardware implementation was based on CMOS 90 nm standard cell library. Such a solution allowed us to lower significantly the area and power consumption of the circuit while keeping reasonable inference speed of about 280 KFLIPS. Type-2 Fuzzy Sets The following definition describes a classical fuzzy set. Definition 1. Fuzzy set A (type-1 fuzzy set) is a set of pairs defined on a universe of discourse X, (1) where μA is a membershi[...]

Charakteryzacja komórek standardowych CMOS dla generacji wektorów testowych

Czytaj za darmo! »

Proces testowania układu cyfrowego wymaga podania na jego wejścia sekwencji wektorów testowych (krótko - testów) i obserwacji odpowiedzi układu - stanów logicznych wyjść lub poboru prądu. Ponieważ koszt testowania jest proporcjonalny do czasu jego trwania, dąży się do znalezienia możliwie krótkiej sekwencji testów, która pozwoli wykryć jak najwięcej potencjalnych uszkodzeń. Miarą jakości sek[...]

 Strona 1